• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention relates to a method for manufacturing a DMOS Tr, comprising the steps of: preparing a semiconductor substrate on which a ⒜field oxide film is formed; Implanting impurities into the substrate to form a first diffusion region between gates; And (b) forming a second diffusion region under the first diffusion region by re-injecting impurities into the substrate, thereby providing a method for producing a DMOS Tr, whereby a uniform concentration in the P channel region is provided. It has a distribution, and even if a slight misalignment occurs in the gate photographing process, there is almost no variation in the overall P-type diffusion region.
    公开号:KR19980056064A
    申请号:KR1019960075326
    申请日:1996-12-28
    公开日:1998-09-25
    发明作者:차승준
    申请人:김광호；삼성전자 주식회사；
    IPC主号:
    专利说明:

    Manufacturing Method Of DMOS Tr
    The present invention relates to a method of manufacturing a DMOS Tr, and more particularly, ion implantation into a P-type diffusion region before and after gate formation to make the concentration uniform throughout the entire channel, and in particular the concentration in the drain region toward the center of the channel. The present invention relates to a method for producing a DMOS Tr having high withstand voltage characteristics in a short channel by improving the breakdown voltage characteristics of the DMOS by bringing it to a concentration.
    1 and 2 are cross-sectional views showing the manufacturing steps of the DMOS Tr according to the prior art.
    1 and 2, a semiconductor substrate 10 having a silicon single crystal structure having a gate oxide 20 spaced apart from the field oxide film 30 is prepared, and the field oxide film 30 and the gate 20 A photo resist 40 is uniformly applied to the top surface. At this time, the photoresist 40 is applied in addition to the portion where the diffusion region is to be formed.
    Thereafter, impurities are implanted into the semiconductor substrate 10 to form a P-type diffusion region 50 (channel region). Then, the photoresist 40 is removed by an etching method to produce a DMOS Tr.
    Conventional Tr having such a structure generally uses a method of implanting impurities after forming a gate to form a channel region of a DMOS, which is a power device. The concentration of the channel region is nonuniform, especially in the drain region. When the drain voltage is the lowest, the voltage resistance is degraded because it easily depletes toward the channel and causes punch through.
    In order to overcome such cavitation, it is necessary to take a long channel length, which increases the overall Tr size and thus weakens the product competitiveness.
    Accordingly, it is an object of the present invention to provide a method for manufacturing a DMOS Tr that can have high breakdown voltage characteristics in a Tr having a short channel by improving the breakdown voltage characteristics of the DMOS.
    1 and 2 are cross-sectional views showing the manufacturing steps of the DMOS Tr according to the prior art.
    3 to 6 are cross-sectional views showing the manufacturing steps of the DMOS Tr according to the present invention.
    * Description of the main parts of the drawings *
    110 semiconductor substrate 120 gate poly
    122: gate 130: field oxide film
    140, 142: photoresist 170, 172: P-type diffusion region
    In order to achieve the above object, the present invention comprises the steps of preparing a semiconductor substrate on which a full-field oxide film is formed; Implanting impurities into the substrate to form a first diffusion region between gates; And (b) forming a second diffusion region under the first diffusion region by re-injecting impurities into the substrate.
    Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.
    3 to 6 are cross-sectional views showing the manufacturing steps of the DMOS Tr according to the present invention.
    3 to 6, a semiconductor substrate 110 having a silicon single crystal structure in which a field oxide film 130 is formed is prepared, and a photo resist is formed on an upper surface of a portion where the field oxide film 130 and a gate are formed. 140 is uniformly applied. An impurity is implanted into the semiconductor substrate 110 to form the first P-type diffusion region 170 (channel region) and the gate poly 120.
    Then, the photoresist 140 is completely removed by etching, and the gate poly 120 is selectively etched to form individual gates 122. In this case, the gate 122 is formed in an adjacent portion of the first P-type diffusion region 170.
    Thereafter, the photoresist 142 is uniformly applied to the top surfaces of the field oxide film 130 and the gate 122.
    At this time, the photoresist 142 is applied except for a portion where the second P-type diffusion region is to be formed. The second P-type diffusion region 172 is formed under the first P-type diffusion region 170 by implanting impurities again.
    Then, the photoresist 142 is removed by an etching method, and the DMOS Tr is manufactured.
    Although the present invention has been described with reference to the above-described embodiments, the present invention is not limited thereto, and it is obvious to those skilled in the art that various modifications and embodiments can be implemented using the present invention. It is.
    According to the method according to the present invention, it has a uniform concentration distribution in the P channel region, and even if a slight misalignment occurs in the gate photographing process, there is almost no variation in the overall P-type diffusion region, thereby improving the process dispersion. have.
    权利要求:
    Claims (3)
    [1" claim-type="Currently amended] (B) preparing a semiconductor substrate on which a field oxide film is formed;
    Implanting impurities into the substrate to form a first diffusion region between gates; And
    (B) implanting impurities back into the substrate to form a second diffusion region under the first diffusion region;
    Method of producing a DMOS Tr comprising a.
    [2" claim-type="Currently amended] The method of claim 1, wherein step VII is:
    Iii-1 applying the photoresist to the upper surface of the field oxide film, applying the film uniformly except for the portion where the first diffusion region is to be formed;
    Iv-2 implanting impurities to form a gate poly and a first diffusion region under the gate poly; And
    Iii-3 removing the photoresist;
    Method of producing a DMOS Tr comprising a.
    [3" claim-type="Currently amended] The method of claim 1, wherein step VII is:
    Iii-1 applying the photoresist to the field oxide film and the upper surface of the gate, applying uniformly except for a portion where a second diffusion region is to be formed;
    Iv-2 implanting impurities to form a second diffusion region under the first diffusion region; And
    Iii-3 removing the photoresist;
    Method of producing a DMOS Tr comprising a.
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    同族专利:
    公开号 | 公开日
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-12-28|Application filed by 김광호, 삼성전자 주식회사
    1996-12-28|Priority to KR1019960075326A
    1998-09-25|Publication of KR19980056064A
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019960075326A|KR19980056064A|1996-12-28|1996-12-28|Manufacturing Method of DMOS Tr|
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